1. Field of the Invention
The present invention relates to a battery charge control apparatus and a method thereof, and in particular to a battery charge control apparatus and a method thereof, which are capable of recognizing whether or not a battery and/or an adapter are sufficiently discharged using computer software and a central processing unit which is disposed therein.
2. Description of the Conventional Art
Conventionally, a battery charge apparatus is directed to be automatically charged in a state when an electronic instrument is connected to an adapter. Unlike a Ni-cd battery, a Li-ion battery is light and is not equipped with a power memory function, so that it is available anytime when it is needed for use.
Referring to FIG. 1, there is shown a circuit showing a conventional battery charge apparatus. As shown therein, it includes a ground connection control circuit 1 having transistors Q1 and Q2 and MOS(Metal Oxide Semiconductor) transistors Tr1 and Tr2 for controlling a connection of an adapter ground terminal AGND and a battery ground terminal BGND in response to battery/adapter mode signals BATT/EXT, a central processing unit 2 for recognizing a voltage of a ground terminal BGND according to a connection of the adapter ground terminal AGND and the battery ground terminal BGND of the ground connection control circuit 1 and for controlling a charge thereof, a power supply circuit 3 consisting of transistors Q8 to Q12 and resistances R17, R19 and R20 for supplying electric power outputted from the central processing unit 2, a battery charge circuit 4 consisting of a first and second amplifiers OP1 and OP2, transistors Q5 to Q7, diodes D1 to D3, condensers C1 and C2 and resistances R3 to R16 in order to charge electric power of the adapter to the battery 6 in response to charge control signals outputted from the central processing unit 2, and a voltage output circuit 5 consisting of transistors Q13 to Q16 and resistances R18, R21 to R23 in order to output a high electric potential outputted from the battery ground BGND and the central processing unit 2.
To begin with, when direct current of the adapter is applied to the camcorder, the battery/adapter signals BATT/EXT of low electric potential is inputted into the base of the transistor Q1. Therefore, the transistor Q1 is turned off and the transistor Q2 which receives the high electric potential in response to the transistor Q1 is turned off, so that an electric potential difference occurs between the battery ground terminal BGND and the adapter ground terminal AGND. According to the electric potential difference therebetween, the voltage Vad of the battery ground terminal BGND is inputted into the charge reference terminal P1 of the central processing unit 2.
Here, the central processing unit 2 recognizes an adapter mode when the voltage Vad of the battery ground terminal BGND is below 4 V and recognizes a battery mode when the voltage Vad thereof is between 4.5 and 5 V.
Thereafter, the central processing unit which receives the voltage below 4 V receives the adapter mode and applies the low electric potential to the base of the transistor Q11 of the power supplying circuit 3 and the base of the transistor Q7 of the charge circuit 4. The transistor Q11 which receives the low electric potential is turned off and applies the high electric potential to the base of the transistor Q11 and the transistor Q10 which receives the high voltage is turned on thereafter.
As the transistor Q10 is turned on, the transistor Q9 which receives the low electric potential is turned off and the high electric potential is applied to the base of the transistor Q8. In addition, as the transistor Q8 which receives the high electric potential is turned off, the voltage of 5 V outputted from the central processing voltage 2 is not applied to the power terminal of the first and second amplifiers OP1 and OP2.
When the charge signals outputted from the charge terminal P2 of the central processing unit 2 is a high electric potential, the transistor Q11 which receives the high electric potential is turned on and thereafter the transistor Q10 which receives the low electric potential is turned off.
As the transistor Q10 is turned off, the transistor Q9 which receives the high electric potential is turned on and the transistor Q8 which receives the low electric potential is turned off.
As the transistor Q10 is turned off, the transistor Q9 which receives the high electric potential is turned on and the transistor Q8 which receives the low electric potential is turned on. As the transistor Q8 is turned on, the power outputted to the power terminal P3 of the central processing unit 2 is respectively applied to the first and second amplifiers OP1 and OP2 through the transistor Q8. The transistor Q8 is controlled by the output signals of the first amplifier OP1 when the first and second amplifiers OP1 and OP2 are normally operated.
As the power is applied to the first and second amplifiers OP1 and OP2 through the transistor Q8, the voltage Vbat applied to the non-inversion terminal(+) of the first amplifier OP1 of the battery charge circuit 4 is defined as the following formula when the resistances R10 and R11 are respectively 22 k.OMEGA. and 100 k.OMEGA.. EQU Vbat=22/(22+100)*Vbgnd=0.181*Vbgand
In addition, the reference voltage Vref1 of the non-inversion(-) is defined as the following formula when the resistances R13 and R14 are respectively 47 k.OMEGA. and 1 k.OMEGA.. EQU Vref1=1/(1+47)*5=0.1 V
In addition, the second amplifier OP2 of the battery charge circuit 4 is defined as the following formula when the resistances R15 and R16 are respectively 1.8 k.OMEGA. and 47 k.OMEGA.. EQU Vref2=1.8/(1.8+47)*5=0.184 V
Thereafter, in case of the adapter mode, as the voltage Vbgnd of the battery ground BGND is higher than the reference voltage Vref1, the condition of Vbat.gtoreq.Vref1 is resulted thereby and thereafter the output Vo1 of the first amplifier OP1 becomes a high electric potential and the high electric potential is applied to the base of the transistor Q12 of the power supply circuit 3. Meanwhile, as the condition of Vbatt&lt;Vref2 is defined, the output Vo2 of the second amplifier OP2 becomes the high electric potential and the high electric potential is applied to the emitter of the transistor Q7 of the battery charge circuit 4.
As the transistor Q12 of the power supply circuit 3 which receives the high electric potential is turned on and as the low electric potential is applied to the base of the transistor Q8, the transistor Q8 is turned on, so that the high electric potential 5 V outputted from the central processing unit 2 is applied to the base of the transistor Q14 of the voltage output circuit 4 through the transistor Q8.
Thereafter, as the transistor Q14 of the voltage output circuit 4 which receives the high electric potential is turned on and then the low electric potential is applied to the base of the transistor Q15. As the transistor Q15 which receives the low electric potential is turned off, the transistor Q16 which receives the high electric potential is turned off. As the transistor Q16 is turned off, the voltage of the battery ground terminal BGND is applied to the resistance R18. Thereafter, the high electric potential 5 V of the central processing unit 2 is applied to the base of the transistor Q13 and then the transistor Q13 is turned off. Thereafter, as the transistor Q13 is turned off, the voltage Vad of the battery ground terminal BGND which is below 4 V is applied to the charge reference terminal P1 of the central processing unit 2 through the resistance R12.
The central processing unit 2 which detects the voltage Vad recognizes the adapter mode and applies the low electric potential charge signals to the base of the transistor Q7 of the battery charge circuit 4. Thereafter, as the transistor Q7 which receives the low electric potential charge signals is turned on, the transistor Q6 which receives the high electric potential output Vo2 of the second amplifier OP2 through the transistor Q7 is turned on. As the transistor Q6 is turned on, the transistor Q5 which receives the high electric potential output of the first amplifier OP1 through the transistor Q6 is turned on, thereby the battery charge operation is enabled.
Here, the charge conditions for the circuit is as follows. To begin with, the battery voltage of anode(+) is smaller than 9.1 V of the diode D1. That is, the condition of Vbatt(+)&lt;Vd1 is resulted. The voltage of the battery ground BGND is greater than 0.1 V and less than 5.2 V. Here, the charge signals of the central processing unit should be a low electric potential and the output Vo1 of the amplifier OP1 should be a high electric potential.
When the direct current is not applied to the camcorder, that is, in case of the battery mode, the battery/adapter mode signals BATT/EXT of the high electric potential is inputted into the base of the transistor Q1 of the ground connection control circuit 1.
As the transistor Q1 which receives the high electric potential is turned on and as the transistor Q2 which receives the low electric potential is turned on, the transistors TR1 and TR2 which receives the high electric potential are respectively turned on, so that the battery ground terminal BGND is connected to the adapter ground terminal AGND.
Thereafter, since the voltage Vbat by the divided voltage of the resistances R10 and R11 applied to the non-inversion terminal(+) of the first amplifier OP1 of the battery charge circuit 4 is less than the reference voltage Vref1, the low electric potential output Vo1 of the first amplifier OP1 is applied to the base of the transistor Q2 of the power supply circuit 3.
As the transistor Q12 of the power supply circuit 3 which receives the low electric potential output Vo1 of the first amplifier OP1 is turned off, the high electric potential. 5 V outputted through the power terminal P3 of the central processing unit 2 is applied to the base of the transistor Q8 of the power supply circuit 3 through the resistance R20 of the power output circuit 4. Thereafter, the transistor Q8 which receives the high electric potential is turned off, so that an high electric potential outputted from the central processing unit 2 is cut off and then the low electric potential is applied to the base of the transistor Q14 of the power output circuit 4. As the transistor Q14 is turned off, the transistor Q15 which receives the high electric potential is turned on. As the low electric potential is applied to the base of the transistor Q16 of the power output circuit 4, the transistor Q16 is turned on.
Thereafter, when the high electric potential 5V outputted from the power terminal P3 is applied to the charge reference terminal P1 of the central processing unit 2, the central processing unit 2 recognizes the applied 5 V as the battery mode.
In addition, as the transistor Q8 of the power supply circuit 3 is turned on, the reference voltage Vref2 is less than or equal to the voltage Vbatt applied to the inversion terminal(-) of the second amplifier OP2, so that the charge circuit is not enabled due to the low electric potential of the output Vo2 of the second amplifier OP2.
Here, the adapter voltage ACV is over 9.2 V and the voltage Vbgnd of the battery ground BGND is over 5.2 V.
However, the conventional battery charge control apparatus and a method thereof have disadvantages in checking the residue voltage inputted into the analog/digital converter in the central processing unit unless the battery/adapter mode signal is applied to the central processing unit selecting the battery and the external power, so that the central processing unit should continuously check the residue voltage which is inputted, and thus the voltage consumption increase and the camcorder is subject to heat and thus malfunctions may occur. In addition, in order to secure a Li-ion battery in the adapter charge circuit, the manufacturing error occurs thereby and more space is needed therein due to the increased parts thereof.